MIL-DTL-87929D
b. For each detail part, identiication shall be by reference designations.
c. For each detail part, the principal electrical characteristics expressed in actual values (ohms,
microfarads, microhenrys, etc.) shall be tabulated next to the diagram and indexed by reference
designation to applicable points on the diagram when suficient space is not available on the
diagram itself. Values normally shall be expressed as numbers, omitting the unit of measurement
(such as ohms). However, a general note shall state which units are used.
d. Wave shapes, duration, and amplitude of voltages at designated test points throughout the circuit
and at interconnecting points within the equipment or systems, under normal test conditions and
other speciied conditions, shall be indicated on the schematic diagram of the component.
3.3.10.3.3 Overall schematic diagrams. If separate component diagrams are not provided, the overall
equipment schematic shall show the information identiied in 3.3.10.3.2. In addition, diagrams shall show
inter-equipment circuits with the connections and terminals properly numbered. Items of equipment
shall be indicated by a series of broken lines.
3.3.10.3.4 Power and control schematics. Separate schematic diagrams to show the power and control
circuits, when it is infeasible to show such information on the overall schematic diagram, shall be prepared
as follows: each power circuit and each control circuit with its relationship to the signal circuits using
a combination of blocks, schematics, or pictorial diagrams; tolerances of power distribution associated
with each power and control circuit.
3.3.10.3.5 Module schematic diagrams. Schematic diagrams of electronic modules, when shown separately,
shall be arranged to indicate signal low progressing from left to right. Where possible, an equivalent
block/logic diagram of the module circuitry shall be placed on the schematic to aid in interpreting
the schematic.
3.3.10.4 Logic diagrams. When feasible, overall operation of the equipment shall be shown by conventional
logic diagrams. Current equipment utilizing solid state and integrated circuit devices is understood and
troubleshooting is accomplished by means of logic diagrams rather than detailed schematics.
3.3.10.5 Waveform diagrams. Waveform diagrams shall be provided, if required, in support of maintenance
tasks and the information is not provided on functional or schematic diagrams. These diagrams shall show
the waveforms and nominal values, as seen in an oscilloscope of a type listed in WP 003 of the manual, at
designated points for normally functioning equipment or systems. Operating conditions and switch positions
shall be noted at the time of each indication.
3.3.10.6 Terminal voltage diagrams. Voltages to ground, or identiied points for all sockets and terminal
points of individual circuits shall be shown on terminal voltage diagrams. These diagrams shall provide
measurements between various subassemblies, assemblies, and detail parts of a component or equipment of a
system. Voltages between terminals shall be shown if signiicant. All pin numbers shall be shown. The
ohm-per-volt rating of the voltmeter and its voltage scale shall be indicated. The type of voltage (AC or
DC) and critical voltages and frequencies shall be stated, showing allowable tolerances. The power supply,
if any, and all control settings shall be noted.
3.3.10.7 Terminal resistance diagrams. Resistance to ground, or to other identiied points for all socket
terminals and terminal points of individual circuits shall be shown on terminal resistance diagrams.
Preparation shall be essentially the same as for terminal voltage diagrams.
3.3.10.8 Combination diagrams. Combinations of the information required by 3.3.10.3 through 3.3.10.7
shall be shown on a single diagram, where feasible.
3.3.10.9 Interconnection cable diagrams. These diagrams shall show the cabling or connections for the
system, equipment, or component. Interconnections between components or equipment shall be indicated by
either a diagram or a table. Where applicable, a complete internal wiring diagram of each junction box,
indicating the relationship to the external wiring circuits, shall be provided.
3.3.11 Test point identiication. Test point identiication shall be incorporated on schematic wiring diagrams,
tables, charts, and illustrations. Test point identiication will not be required for equipment with self-test
capability, equipment designed to be tested by an automatic checkout system, and equipment designed with
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